People

All the members of the Institute for Computing Systems Architecture.

 

Mahesh Marina

 

 

Mahesh Marina

Institute Director

 

Wireless networks, mobile systems, machine learning applications in wireless networks and mobile systems, mobile privacy, network security

Academic Members

Pramod Bhatotia

Pramod Bhatotia

Systems, Distributed Systems, Operating Systems
Murray Cole
Murray Cole Parallel algorithms, skeletal parallel programming
Christophe Dubach
Christophe Dubach   
Bjoern
Bjoern Franke Software Transformation Driven By Dynamic Information
Boris
Boris Grot Computer architecture, memory systems and interconnection networks. Architectural support for large-scale data processing. Systems with quality-of-service guarantees
Hugh Leather
Hugh Leather

Deep learning for compilers and systems. Energy and performance of data-centres. Mobile systems

Myungjin Lee
Myungjin Lee Computer networks, network measurement and monitoring, data centres, cloud computing
Vijay Nagarajan
Vijay Nagarajan General research interests: Software/hardware collaborative techniques for enhancing performance, programmability, reliability and security of parallel architectures. Current research topics: Memory consistency, cache coherence and synchronization for scalable parallel architectures
Mike O'Boyle
Mike O'Boyle  Auto-parallelisation, machine learning based compilation, optimising for heterogeneous multi-cores, GPU optimisation, design space exploration, robotics/vision/deep learning application drivers
Paul Patras
Paul Patras  Performance optimisation in wireless networks, network protocols and architectures, mobile traffic analysis, security and privacy, prototyping and test beds.
  Aaron Smith Post-Moore computing, optimizing compilers, hardware/software co-design, embedded systems, computer architecture, machine learning
Nigel Topham
Nigel Topham  Design and analysis of high-performance computing systems, architecture simulation tools

Associate Member

David Aspinall  
Roberto Castaneda Lozano Compilers, parallelization, combinatorial optimization, testing and verification

Tariq Elahi

 
Jose Cano Reyes Computer Architecture, Computer Systems, Compilers, Interconnection Networks, Deep Learning
Marcelo Cintra  Computer Architectures, Parallel and High-Performance Computing, Scientific Computing
Chris Fensch The design of many-core architecture and its implications on programability
Jane Hillston  
Paul Jackson  
Markulf Kohlweiss  

Milos Nikolic

 
Ajitha Rajan  
Michel Steuwer  

Research Staff

Pavlos Petoumenos Automatically creating representative workloads for designing, training, and evaluating optimisation heuristics
Xenofon Foukas Wireless and mobile networking, next generation mobile network architectures, network virtualization, prototyping and testbeds
Arpit Joshi Providing architectural support for systems with persistent (non-volatile) memory
Lu Li Code transformations for high-performance optimizations
Tom Spink  
Harry Wagstaff Instruction set simulation, architecture description languages, formal verification

Honorary Members and Visitors

Dr Gordon Brebner - Honorary Professor
Dr Marcelo Cintra - Honorary Professor
Dr Christian Fensch - Honorary Professor
Dr Francisco Garcia - Honorary Professor
Dr Roland Ibbett - Honorary Professor

Students

Lanre Adeoluwa  
Maurice Bailleu  
Ludovic Capelli  
Bruce Collie  
Lewis Crawford  
Christopher Cummins Experimental semantics and pragmatics, quantity expressions, implicature, presupposition, dialogue modelling
Priyank Faldu Microarchitecture enhancements, simulator design & implementation, workload characterization for bottleneck analysis, debugging performance issues on real hardware, programming parallel softwares, accelerating applications using GPU via OpenCL/CUDA etc.
Andrew Faulds  
Vasileios Gavrielatos  
Philip Ginsbach  
Adam Harries  
Vikto Ivanov  
Maurice Jamieson  
Mohamed Kassem  
Antonis Katsarakis  
Kuba Kaszyk Fast and Accurate GPU Simulation
 Siavash Katebzadeh Computer Architecture, Compilers and the use of the graphics processing unit (GPU) as a general purpose processor. Currently I am working on Network Topologies, Routing and Congestion Control with particular emphasis on Predictable Datacenters
Martin Kristien  
Rui Li Resource allocation in mobile networks, optimisation, and network protocols
Aleksandr Maramzin  
Artemiy Margaritov  
Paul Metzger

Pattern Based Parallel Programming Language Models, Schedulers for Heterogeneous and Homogeneous Systems

Paul-Jules Micolet Dynamic Reconfigurable Architectures, Compiler Optimisations and Programming Languages
Naums Mogers Computational optimisation of Neural Networks, rewrite rules-based compilation, GPGPU
Paschalis Mpeis

Personalized optimization for interactive mobile applications. It uses a transparent approach that captures user inputs and replays them afterwards to apply offline iterative compilation

Nicolai Oswald  
Christos Perivolaropoulos  
Federico Pizzuti  
Matthew Pugh  
Toomas Remmelg  
Rodrigo Rocha Optimising compilers, compiler construction, parallel programming for heterogeneous architectures, and energy-aware high-performance computing
Martin Ruefenacht  
Christof Schlaak  
Amna Shahab  
Rajkarn Singh  
Larisa Stoltzfus Performance portability, HPC, 3D wave models
Jorg Thaleim  
Galini Tsoukaneri  

Jack Turner

Hardware aware compilation of deep learning models for embedded systems
Christos Vasiladiotis Interest is the automatic compiler parallelization of legacy software and its further promotion to structured parallel patterns, with a focus on loop level parallelism
Chad Verbowski  
Justs Zarins  
Chaoyun Zhang Deep learning, mobile networking, spatio-temporal data mining
Mingcan Zhu Memory systems for data centres, Processor architecture and micro-architecture

Administration

Portfolio Manager
Nina Abbott-Barish Finance Administrator
Steph Smith Support Office Secretary
Jodie Cameron Support Office Secretary

Commercialisation

Keith Edwards (Senior Business Development Executive)