People
All the members of the Institute for Computing Systems Architecture.
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Institute Director |
Wireless networks, mobile systems, machine learning applications in wireless networks and mobile systems, mobile privacy, network security |
Academic Staff
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Sam Ainsworth | Computer architecture, optimising compilers, architectural and programming language security, memory systems, memory-level parallelism, fault tolerance |
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Antonio Barbalace |
Systems Software (hypervisor, operating systems, runtime, compiler and linker) for parallel, distributed and heterogeneous computer architecture (including near data processing platforms) Real-time and general-purpose scheduling, targeting large deployments (data-center) as well as small-devices (embedded/IoT) |
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Murray Cole | Parallel algorithms, skeletal parallel programming |
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Bjoern Franke | Software Transformation Driven By Dynamic Information |
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Tobias Grosser | Compiler Optimization, Loop Optimization, High-Performance Computing, Linear Programming Solvers, Climate Modeling, Hardware Design Languages, Programmer Productivity, Domain-Specific Compilation, Programming Languages |
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Boris Grot | Computer architecture, memory systems and interconnection networks. Architectural support for large-scale data processing. Systems with quality-of-service guarantees |
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Michio Honda | System Software for Networking, Systems for Machine Learning, Internet Architecture and Datacenter Systems |
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Hugh Leather |
Deep learning for compilers and systems. Energy and performance of data-centres. Mobile systems |
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Luo Mai | Computer Systems and Networking, Distributed Machine Learning, Big Data Processing, Cloud-Edge AI Systems |
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Vijay Nagarajan | Software/hardware collaborative techniques for enhancing performance, programmability, reliability and security of parallel architectures. Memory consistency, cache coherence and synchronization for scalable parallel architectures |
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Mike O'Boyle | Auto-parallelisation, machine learning based compilation, optimising for heterogeneous multi-cores, GPU optimisation, design space exploration, robotics/vision/deep learning application drivers |
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Paul Patras | Performance optimisation in wireless networks, network protocols and architectures, mobile traffic analysis, security and privacy, prototyping and test beds |
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Amir Shaikhha | domain-specific languages, databases, programming languages, compilers |
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Post-Moore computing, optimizing compilers, hardware/software co-design, embedded systems, computer architecture, machine learning | |
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Michel Steuwer | Areas of interest: Compilers, intermediate representations, programming languages, structured parallel programming, heterogeneous and GPU computing, performance portability, novel compilation techniques for high-level languages |
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Nigel Topham | Design and analysis of high-performance computing systems, architecture simulation tools |
Associate Members
| David Aspinall | Computer security (particularly proof-carrying code), type systems for specification and programming languages, and proof development environments |
| Computer and network security and privacy enhancing technologies (PETs) with an emphasis on effective, efficient, and robust deployments | |
| Vashti Galpin |
Formal modelling and simulation of micro-architecture security |
| Jane Hillston | Quantitative analysis and verification supported by formal methods: stochastic process algebras, stochastic logic, Markov processes, continuous approximations, performance modelling, systems biology, collective adaptive systems |
| Paul Jackson | Formal verification of hardware, software and cyber-physical systems. Formalised mathematics. Automation of formal reasoning |
| Markulf Kohlweiss | Foundations of cryptography, formal verification, and applied cryptography |
| Database management systems, in-database learning, large-scale data analytics, stream processing | |
| Ajitha Rajan | Software engineering, challenges in software testing |
Research Staff
| Sakib Ahamed | ||
| Roberto Castaneda Lozano | Compilers, parallelization, combinatorial optimization, testing and verification | |
| Chris Cummins | ||
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Aboubacar Diallo
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| Alexis Duque | ||
| Jakub Kaszyk | ||
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Lu Li | High performance autotuing compiler for accelerators, parallel algorithms, skeletal parallel programming |
| Micheal Michaelides | ||
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Magnus Morton | Parallelisation, dynamic program analysis and transformation, and heterogeneous accelerators |
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Tom Spink | High-performance cross-architecture virtualisation, High-speed simulation, JIT compilation for DBT |
| Jiawen Sun | ||
| Yuan Wen |
Honorary Members
| Pramod Bhatotia | Systems, Distributed Systems, Operating Systems |
| Prof. Gordon Brebner | |
| Prof. Marcelo Cintra | Computer Architectures, Parallel and High-Performance Computing, Scientific Computing |
| Dr Christophe Dubach | |
| Dr Christian Fensch | The design of many-core architecture and its implications on programability |
| Prof. Francisco Garcia | |
| Prof. Roland Ibbett | |
| Dr Pavlos Petoumenos | Automatically creating representative workloads for designing, training, and evaluating optimisation heuristics |
Visitors
| Dr Jose Cano Reyes | Computer Architecture, Computer Systems, Compilers, Interconnection Networks, Deep Learning |
| Dr Harry Wagstaff |
Students
| Lanre Adeoluwa | |
| Maurice Bailleu | |
| Ludovic Capelli | |
| Bruce Collie | |
| Lewis Crawford | |
| Alec Diallo | |
| Adarsh Doddappagouda Patil | Computer architecture and memory systems design |
| Yini Fang | |
| Vasili Gavrielatos | Consistency enforcement in distributed systems (aka replication protocols) amd multiprocessors (aka coherence protocols) |
| Dimitra Giantsidi | |
| Celeste Hollenbeck | |
| Viktor Ivanov | |
| Maurice Jamieson |
Use of micro-core architectures for High-Performance Computing (HPC) and embedded applications, with a focus on programmability in terms of design (kernel offload abstractions) and implementation (compiler and runtime techniques) |
| Kuba Kaszyk | Fast and Accurate GPU Simulation |
| Siavash Katebzadeh | Computer Architecture, Compilers and the use of the graphics processing unit (GPU) as a general purpose processor. Currently I am working on Network Topologies, Routing and Congestion Control with particular emphasis on Predictable Datacenters |
| Antonis Katsarakis |
Distributed Systems & Data Replication |
| Caner Kilinc | Data driven applied Machine Learning and Artificial Intelligence in 5G Automation |
| Amir Khordadi | |
| Mark Klaisoongnoen | |
| Martin Kristien | Instruction set simulation for multicore systems |
| Jon Larrea Martinez | Mobile networks, networking systems and operating systems |
| Zhibo Li | Data-Centric parallelisation |
| Haoyu Liu | |
| Martin Lucke | |
| Aleksandr Maramzin | Parallelizing compilers, parallel programming, assistance for a software engineer in the task of manual software parallelization |
| Artemiy Margaritov | |
| Nikos Mavrogeorgis | |
| Paul Metzger | Skeletal parallel programmig, run-time systems, parallel real-time systems |
| Rupen Mitra | Networked systems, Mobile Networking, Network Security |
| Naums Mogers | Compilation with machine learning-driven automatic parallelization targeting heterogeneous multi-core platforms such as CPUs, GPUs and FPGAs |
| Paschalis Mpeis |
Personalized optimization for interactive mobile applications. It uses a transparent approach that captures user inputs and replays them afterwards to apply offline iterative compilation |
| Martynas Noreika | |
| Nicolai Oswald | |
| Christos Perivolaropoulos | |
| Federico Pizzuti | |
| Matthew Pugh | |
| Xueying Qin | |
| Rodrigo Rocha | |
| Heba Salem | |
| David Schall | |
| Christof Schlaak | Optimising compilers, HPC, hardware design, machine learning |
| Amna Shahab | Computer architecture, memory systems, distributed machine learning |
| Rajkarn Singh | |
| Dimitrios Stavrakakis | |
| Larisa Stoltzfus | HPC, code generation, compilers, stencils, scientific computing |
| Christodoulos Stylianou | |
| Chuanhao Sun | |
| Jakub Szewczyk | |
| Jorg Thalheim | |
| Jack Turner | |
| Harshavardhan Unnibhavi | |
| Dmitrii Ustiugov | Crossroads of Computer Systems and Computer Architecture with a focus on hardware and AI support for cloud infrastructure |
| Christos Vasiladiotis | Interest is the automatic compiler parallelization of legacy software and its further promotion to structured parallel patterns, with a focus on loop level parallelism |
| Chad Verbowski | |
| Mahesh Wickrama Arachchilage | |
| Jackson Woodruff | Using the compiler to manage reconfigurable hardware |
| Justs Zarins |
Administration
| Craig McKenzie Smith | Finance Administrator |
| Jodie Cameron | Institute Administrative Assistant |
| Joanne Pennie | Portfolio Manager |
| Ryan Ferguson | Institute Administrative Assistant |
| Steph Smith | Insitute Administrator |
Commercialisation
| Keith Edwards | Senior Business Development Executive |