PPar Lunch Series 2019/20

PPar lunch series schedule for 2019/20

Semester 1


Date Student Organiser Speaker Title/Abstract
Wed 18th September Vanya Yaneva    
Wed 16th October Lewis Crawford Georgi Mirazchiyski, Codeplay

Introducing SYCL as a parallel model.


Computer system architecture trends are constantly evolving to provide higher performance and computing power, to support an increasing demand for high-performance computing domains including AI, machine learning, image processing and automotive driving aids. The most recent being the move towards heterogeneity, where a system has more than one kind of processor working together in parallel. These kinds of systems are everywhere, from desktop machines and high-performance computing servers to mobile and embedded devices.  This talk will present the importance of programming GPUs and heterogeneous devices more efficiently using the SYCL parallel programming model and standard modern C++.

Wed 20th November Rodrigo Caetano de Oliveriera Rocha Dr. Gang Yu, Huawei Edinburgh Research Centre

TPP: C++ template programming framework targeting heterogeneous accelerator.


Davinci core is Huawei in-house deep learning accelerator, it features scalable, high-performance, domain-specific and asynchronized hierarchical memories. How to program these typical heterogeneous domain specific cores raises challenges for programming framework and compiler researchers. We present Tensor Plus Plus: our on-going work in Edinburgh to build up abstract, high performance modern template based C++ framework for heterogeneous core. In this talk, we analyse the requirements, present our design choices and evaluate the results on various topics including the core model, the data model, compile-time/run-time constants and expression templates. We hope the talk can interest the programming researchers and get more collaborations involved.

Wed 11th December Martin Kristien Dr.Ross Duncan, University of Strathclyde and Head of Quantum software at Cambridge Quantum Computing Ltd.

Compilation for Near Term Quantum Computers

As everyone who reads the news will know, quantum computers are now here, albeit not very many of them.  Today's quantum computers, and those of the near future, the so-called Noise Intermediate Scale Quantum (NISQ) devices, are nothing like those described in the textbooks.  I will discuss some of the key differences and how modern compilers, such as CQC's t|ket> try to overcome the limitations of NISQ devices.


Semester 2 

Date Student Organiser Speaker Title/Abstract
Wed 15th January Rado Kirilchev Dr. Colin Arthur, R&D Manager and Dr. Ricardo Almeida, R&D Researcher, Keysight Laboratories

Keysight Technologies is the world's leading electronic measurement company, transforming today's measurement experience through innovations in wireless, modular, and software solutions.

 Keysight's products include hardware and software for capturing and analyzing data at phenomenal bit rates and scale. To test the latest 5G communications standards, the most sustainable Electric Vehicle systems, or the fastest Cloud datacenter interconnects, Keysight Labs invents systems with unmatched throughput and programmability, with machine learning and data analytics capabilities that accelerate customers’ workflow and insight.

 In this talk, we will describe our applied research on state machines to achieve the triggering mechanism within our latest oscilloscopes. We will describe the digital-triggering problem from a language-theoretical point of view and how we established a correspondence between triggering specifications and regular expressions. Standard and extended theory were used to define a chain of state-machine manipulations that allows us to parallelize and accelerate complex expressions, and then deploy them efficiently in hardware. We will present how, by combining extensions to regular-expressions syntax with hardware acceleration techniques, we have developed compression and acceleration systems which enable unique performance and programmability.

Wed 19th February Antonios Katsarakis Keith Wansbrough, Software Architect, Metaswitch Networks

Rust and Microservices at Metaswitch

 Abstract: A few years ago, Metaswitch pivoted to a new, cloud-native approach to all new development. We architect for scalability, decompose our products into microservices, build them on a common platform, and implement them in Rust.

 In this talk I’ll explain a little of what that architecture looks like, and the languages, tools, and techniques we use to rapidly and reliably implement the solutions our customers need. I will touch on:

  • Decomposition into microservices and libraries, with the corresponding challenges of dependency management and APIs.
  • Our successful use of Rust, with its safety guarantees, “fearless concurrency”, and asynchronous control flow using Futures.
  • The architectural techniques required to scale a complex stateful application reliably across hundreds of servers.

I hope to interest you in the challenges we face in this space, and engage with the PPar community on how we can work more closely together.

Wed 18th March Maximiliana Behnke Cancelled CANCELLED
Wed 15th April Paul Piho Stephen Dolan, Jane Street POSTPONED
Wed 20th May Andrej Ivanis Prof Andrew Gordon, Principal Research Manager at Microsoft Research, Cambridge and University of Edinburgh. POSTPONED
Wed 17 June Naums Mogers Satnam Singh of Google AI POSTPONED